In many modern computer program applications, especially those dealing with large arrays, the maximum pulse width of clock signals operating on these arrays needs to be limited. If the pulse width is too wide, for example, it can cause pre-charged array nodes to lose their logic value and result in array failure. Thus, it is common for a clock source to be pulse-width limited before being asserted onto array grids. One example of a novel technique is described in the invention entitled A SIMPLIFIED METHOD FOR LIMITING CLOCK PULSE WIDTH, Ser. No. 10/692,416, which proposes a circuit that limits the maximum pulse width of a clock source.
One important issue that needs to be addressed is the off-chip characterization of such pulse-width limiter circuits in a typical bandwidth-limited laboratory setup. For example, a pulse-width limiter with a maximum allowable pulse width of 100 picoseconds (ps) will have significant power at around 1/100 ps (10 GHz). However, typical laboratory setups that can guarantee signal integrity at such frequencies are often cost-prohibitive. Therefore, a methodology is required that is capable of quantifying the maximum pulse width from a pulse-width limiter circuit in an ordinary bandwidth-limited laboratory environment.
One possible solution is on-chip characterization of the pulse-width limiter output. This can be accomplished, for example, by sampling the pulse-width limiter output with various phases of a voltage-controlled oscillator (VCO) input. However, this approach relies on the discrete phases available from the VCO and, therefore, this discreteness limits the resolution. Moreover, unless the VCO is locked, by, for example, a phase locked loop (PLL), the VCO input can be compromised by large jitter at each of its phases, thereby increasing the measurement uncertainty.
An alternative approach to bypassing the measurement bandwidth constraint employs pulse stretcher circuitry. Pulse stretchers, for example, can extend or stretch the output of the pulse-width limiter, thereby reducing the bandwidth requirement of the laboratory measurement setup. This approach, however, is also subject to limitations. In particular, the precise magnitude of the pulse extension caused by the pulse stretchers has to be known, which thereby requires characterization of the pulse stretchers' performance itself. Thus, while one can employ the pulse stretchers to bring the test output within the bandwidth requirement of the measurement setup, the desired measurement remains unknown without an often-complicated additional characterization of the pulse stretchers.
Therefore, there is a need for a system and/or method for on/off-chip characterization of pulse-width limiter outputs that addresses at least some of the problems and disadvantages associated with conventional systems and methods.